Contact plug in semiconductor device and method of forming the same

ABSTRACT

Disclosed are a contact plug in a semiconductor device and method of forming the same. After a junction region where a contact plug is formed upwardly up to the bottom of a metal wire, the raised junction region and the metal wire are connected by a contact plug. Or after a first contact plug of the same area is formed on the junction region up to the bottom of the metal wires, the first contact plug is connected by a second contact plug. Thus, the width of the contact plug except for some portions is increased by maximum. It is thus possible to prevent an electric field from being concentrated and prohibit on-current from reduced, thus improving the electrical properties of devices.

BACKGROUND

1. Field of the Invention

The present invention relates to a contact plug in a semiconductor device and method of forming the same, and more specifically, to a contact plug in a semiconductor device which can prevent an electric field from being concentrated, and method of forming the same.

2. Discussion of Related Art

Conventionally, the peripheral pitch is not critical compared to the cell pitch. As the level of integration in a device increases, however, the peripheral pitch becomes important as much as the cell pitch. For this reason, as the peripheral elements shrink as much as the cell, a metal layer that is difficult to shrink relatively compared to a device composed of polysilicon.

FIG. 1 is a cross-sectional view showing the structure of a contact plug in a semiconductor device in the related art and FIG. 2 is a cross-sectional view of the device taken along lines A-A′ shown in FIG. 1.

Referring to FIG. 1 and FIG. 2, a transistor having a gate 103 and a source/drain 104 is formed in a semiconductor substrate 101. The gate 103 and the source/drain 104 are each connected to metal wires 109 a and 109 c through contact plugs 107 a and 107 b, respectively. Meanwhile, metal wires 109 b for electrically connecting neighboring other elements are formed around the metal wires 109 a and 109 c each connected to the gate 103 and the source/drain 104. Unexplained reference numeral 102 indicates an isolation film, and 106 and 108 designate interlayer insulating films.

At this time, as the degree of integration in the device increases, it is required that the junction region of the transistor be connected to the metal wires with only a single contact plug. For example, although the area of the source/drain 104 is wide, various metal wires 109 a and 109 b are formed on the source/drain 104. Only the metal wire 109 a of the metal wires 109 a and 109 b is connected to the source/drain 104. For this reason, there occurs a case where only one contact plug 107 a has to be formed since the width of the metal wire 109 a is narrow although the area of the source/drain 104 is wide.

In this case, an electric field (indicated by dotted arrows) is concentrated on the contact plug 107 a having a narrow width. This may result in a problem that on-current is reduced compared to a case where several contact plugs are formed.

SUMMARY OF THE INVENTION

The present invention is directed to a contact plug in a semiconductor device and method of forming the same wherein after a junction region having a contact plug formed therein is formed up to the bottom of metal wires, the junction region and the metal wires are connected by a contact plug, or after a first contact plug of the same area is formed on the junction region up to the bottom of the metal wires, the first contact plug is connected to a second contact plug, whereby the width of the contact plug except for some portions of the contact plug is increased by maximum to prevent an electric field from being concentrated and prohibit on-current from being reduced, thereby improving the electrical properties of the device.

According to a preferred embodiment of the present invention, there is provided a contact plug in a semiconductor device, wherein the contact plug is formed on a junction region of a semiconductor substrate and has a narrow top and a wide bottom in order to electrically connect any one of metal wires over the contact plug to the junction region while distributing an electric field.

In the above, it is preferred that the width and area of the bottom of the contact plug are the same as those of the junction region, and the top of the contact plug is formed to have a maximum width within a range that the contact plug is not electrically connected to neighboring metal wires considering the width of the metal wire connected to the contact plug.

According to another preferred embodiment of the present invention, there is provided a contact plug in a semiconductor device, comprising: a first plug formed on a junction region of a semiconductor substrate; and a second plug formed on the first plug and connected to any one of metal wires over the second contact plug, wherein the width of the first plug is wider than that of the second plug.

In the above, the first plug may be formed using a polysilicon layer and the second plug may be formed using a metal material. At this time, the second plug can be formed using tungsten.

Meanwhile, the width and area of the first plug may be the same as those of the junction region. It is preferred that the first plug is formed to have a maximum height to the extent that electrical influences are minimized without directly contacting the metal wires.

It is preferable that the second plug is formed to have a maximum width within a range that the second plug is not electrically connected to neighboring metal wires considering the width of a metal wire connected to the second plug.

The first plug can be formed only in a region where the number of the second plug is 4 or less, and the second plug can directly connect the junction region and the metal wire in a region where the number of the second plug is 4 or more.

According to a preferred embodiment of the present invention, there is provided a method of forming a contact plug in a semiconductor device, comprising the steps of: providing a semiconductor substrate in which a junction region such a source/drain is formed; forming a first plug on the junction region; forming an interlayer insulating film on the whole structure including the first plug; forming a contact hole in the interlayer insulating film on the first plug; and forming a second plug in the contact hole, wherein the width of the first plug is wider than that of the second plug.

The first plug may be formed using a polysilicon layer and may be formed by a selective epitaxial growth process. At this time, the first plug may be formed to have the same width as the junction region. Meanwhile, it is preferred that the first plug is formed to have a maximum height to the extent that electrical influences are minimized without directly contacting metal wires formed on the interlayer insulating film.

The second plug may be formed using a metal material and the second plug may be formed using tungsten. At this time, it is preferred that the second plug is formed to have a maximum width within a range that the second plug is not electrically connected to neighboring metal wires considering the width of a metal wire connected to the second plug.

Meanwhile, the first plug can be formed only in a region where the number of the second plug is 4 or less, and is formed so that the second plug directly connects the junction region and the metal wire in a region where the number of the second plug is 4 or more.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view showing the structure of a contact plug in a semiconductor device in the related art;

FIG. 2 is a cross-sectional view of the device taken along lines A-A′ shown in FIG. 1;

FIG. 3 is a cross-sectional view for explaining the structure of a contact plug in a semiconductor device according to an embodiment of the present invention;

FIG. 4 is a cross-sectional view taken along lines A-A′ shown in FIG. 3; and

FIG. 5 is a characteristic graph showing a comparison result of a difference in the electrical properties of devices depending on the number of a contact plug.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Now the preferred embodiments according to the present invention will be described with reference to the accompanying drawings. Since preferred embodiments are provided for the purpose that the ordinary skilled in the art are able to understand the present invention, they may be modified in various manners and the scope of the present invention is not limited by the preferred embodiments described later.

Meanwhile, in case where it is described that one film is “on” the other film or a semiconductor substrate, the one film may directly contact the other film or the semiconductor substrate. Or, a third film may be intervened between the one film and the other film or the semiconductor substrate. Further, in the drawing, the thickness and size of each layer are exaggerated for convenience of explanation and clarity. Like reference numerals are used to identify the same or similar parts.

FIG. 3 is a cross-sectional view for explaining the structure of a contact plug in a semiconductor device according to an embodiment of the present invention and FIG. 4 is a cross-sectional view taken along lines A-A′ shown in FIG. 3.

Referring to FIG. 3 and FIG. 4, a transistor having a gate 303 and a source/drain 304 is formed in a semiconductor substrate 301. The source/drain 304 is connected to a metal wire 309 a through a contact plug 310 and the gate 303 is connected to a metal wire 309 c through a second plug 307 b. Meanwhile, other metal wires 309 b for electrically connecting neighboring other elements are formed around the metal wires 309 a and 309 c each connected to the gate 303 and the source/drain 304. Unexplained reference numeral 302 indicates an isolation film and 306 and 308 designate interlayer insulating films.

Meanwhile, the contact plug 310 that connects the source/drain 304 and the metal wire 309 a has a wide bottom and a narrow top. This will be described in the concrete.

The source/drain 304 has a wide area. Various metal wires 309 a and 309 b are formed over the source/drain 304. Only one of the metal wires 309 a and 309 b is connected to the source/drain 304. Due to this, since the width of the metal wire 309 a is narrow although the area of the source/drain 304 is wide, only one contact plug for connecting the source/drain 304 and the metal wire 209 is formed.

In this case, as the width of the contact plug becomes narrow and an electric field is concentrated on the narrow width of the contact plug, on-current can be reduced. Therefore, the contact plug 310 that connects the source/drain 304 and the metal wire 309 a is formed to have the bottom of a wide width and the top of a normal width.

For example, the contact plug 310 can be formed to have a stack structure of a first plug 305 and the second plug 307 a. Also the bottom of the first plug 305 can be formed to have the same width and area as the junction region at the bottom of the contact plug 310 like the source/drain 304. Furthermore, the height of the first plug 305 is lower than that of the interlayer insulating film 306. This is because if the first plug 305 is formed to have the same height as the interlayer insulating film 306 or to have the height higher than the interlayer insulating film 306, the first plug 305 is electrically connected to the metal wires 309 b formed around the metal wire 309 a connected to the source/drain 304, resulting in fail. It is therefore preferred that the first plug 305 is formed high by maximum to the extent that electrical influences are minimized without directly contacting the neighboring metal wires 309 b, while being formed higher than the height of the interlayer insulating film 306.

Furthermore, the second plug 307 a is formed to have a maximum width to the extent that it is not electrically connected to a neighboring metal wire 309 a considering the width of the metal wire 309 a.

Meanwhile, the contact plug 310 can be formed by the following methods.

As a first method, a transistor having a gate 303 and a source/drain 304 is formed in a semiconductor substrate 301. Before an interlayer insulating film 306 is formed on the whole structure, a polysilicon layer is formed on a junction region such as a source/drain 304, thus forming a first plug 305. Thereafter, an interlayer insulating film 306 is formed on the whole structure and a second plug 307 a is then formed through common processes. Thereby, a contact plug 310 having the first and second plugs 305 and 307 a is formed. At this time, the second plug 307 a can be formed using tungsten.

As a second method, a transistor having a gate 303 and a source/drain 304 is formed in a semiconductor substrate 301. Before an interlayer insulating film 306 is formed on the whole structure, only a region such as a source/drain 304 can be grown by a selective epitaxial growth process, thus forming a first plug 305. Thereafter, the interlayer insulating film 306 is formed on the whole structure and a second plug 307 a is formed through typical processes. Thereby, a contact plug 310 having the first and second plugs 305 and 307 a is formed. At this time, the second plug 307 a can be formed using tungsten.

It is to be noted that the above methods are only embodiments of various methods for forming the contact plug 310, but the method for forming the first plug 305 is not limited to the above methods.

If the width of the contact plug 310 is formed wide by maximum as above, electrical properties of the device can be improved.

FIG. 5 is a characteristic graph showing a comparison result of a difference in electrical properties of devices depending on the number of a contact plug.

Referring to FIG. 5, a first curve (W Ct) is a graph showing on-current properties depending on the number of a contact plug having only a second plug with a first plug not formed. A second curve (Poly Ct) is a graph showing on-current properties depending on a second plug formed on a first plug with the first plug formed.

The first curve (W Ct) and the second curve (Poly Ct) will now be compared. It can be seen that if the number of the contact plug is many, the electrical properties when only the second plug formed using tungsten is formed are better than those in the prior art, but if the number of the contact plug is small, the electrical properties when the first plug is formed and only the second plug is then formed on the first plug are good. For example, if the number of the second plug is 4 or less, it is preferred that the first plug is formed to distribute an electric field in order to improve the electrical properties.

If the second plug of 4 or more in number can be formed since the distance among the metal wires is wide and the metal wires are formed with a sufficient width, the first plug is not formed but only the second plug is formed so that the junction region and the metal wires are electrically connected by the second plug. In other words, the first plug can be formed only in a region where the second plugs of 4 or less in number is formed.

According to the present invention as described above, after a junction region where a contact plug is formed is formed up to the bottom of a metal wire, the raised junction region and the metal wire are connected by a contact plug, or after a first contact plug of the same area is formed on the junction region up to the bottom of the metal wires, the first contact plug is connected by a second contact plug. Thus, the width of the contact plug except for some portions is increased by maximum. It is thus possible to prevent an electric field from being concentrated and prohibit on-current from reduced, thus improving electrical properties of devices. 

1. A contact plug in a semiconductor device, wherein the contact plug is formed on a junction region of a semiconductor substrate and has a narrow top and a wide bottom in order to electrically connect any one of metal wires over the contact plug to the junction region while distributing an electric field.
 2. The contact plug as claimed in claim 1, wherein the width and area of the bottom of the contact plug are the same as those of the junction region.
 3. The contact plug as claimed in claim 1, wherein the top of the contact plug is formed to have a maximum width within a range that the contact plug is not electrically connected to neighboring metal wires, considering the width of the metal wire connected to the contact plug.
 4. A contact plug in a semiconductor device, comprising: a first plug formed on a junction region of a semiconductor substrate; and a second plug formed on the first plug and connected to any one of metal wires over the second contact plug, wherein the width of the first plug is wider than that of the second plug.
 5. The contact plug as claimed in claim 4, wherein the first plug is formed using a polysilicon layer and the second plug is formed using a metal material.
 6. The contact plug as claimed in claim 5, wherein the second plug is formed using tungsten.
 7. The contact plug as claimed in claim 4, wherein the width and area of the first plug are the same as those of the junction region.
 8. The contact plug as claimed in claim 4, wherein the first plug is formed to have a maximum height to the extent that electrical influences are minimized without directly contacting the metal wires.
 9. The contact plug as claimed in claim 4, wherein the second plug is formed to have a maximum width within a range that the second plug is not electrically connected to neighboring metal wires, considering the width of a metal wire connected to the second plug.
 10. The contact plug as claimed in claim 4, wherein the first plug is formed only in a region where the number of the second plug is 4 or less, and is formed so that the second plug directly connects the junction region and the metal wire in a region where the number of the second plug is 4 or more.
 11. A method of forming a contact plug in a semiconductor device, comprising the steps of: providing a semiconductor substrate in which a junction region such a source/drain is formed; forming a first plug on the junction region; forming an interlayer insulating film on the whole structure including the first plug; forming a contact hole in the interlayer insulating film on the first plug; and forming a second plug in the contact hole, wherein the width of the first plug is wider than that of the second plug.
 12. The method as claimed in claim 11, wherein the first plug is formed using a polysilicon layer.
 13. The method as claimed in claim 11, wherein the first plug is formed by a selective epitaxial growth process.
 14. The method as claimed in claim 11, wherein the first plug is formed to have the same width as the junction region.
 15. The method as claimed in claim 11, wherein the first plug is formed to have a maximum height to the extent that electrical influences are minimized without directly contacting metal wires formed on the interlayer insulating film.
 16. The method as claimed in claim 11, wherein the second plug is formed using a metal material.
 17. The method as claimed in claim 16, wherein the second plug is formed using tungsten.
 18. The method as claimed in claim 11, wherein the second plug is formed to have a maximum width within a range that the second plug is not electrically connected to neighboring metal wires, considering the width of a metal wire connected to the second plug.
 19. The method as claimed in claim 11, wherein the first plug is formed only in a region where the number of the second plug is 4 or less, and is formed so that the second plug directly connects the junction region and the metal wire in a region where the number of the second plug is 4 or more. 